One type of non-volatile memory known in the art relies on magnetic memory cells. These devices, known as magnetic random access memory (MRAM) devices, include an array of magnetic memory cells. The magnetic memory cells may be of different types. For example, a magnetic tunnel junction (MTJ) memory cell or a giant magnetoresistive (GMR) memory cell.
Generally, the magnetic memory cell includes a layer of magnetic film in which the orientation of magnetization is alterable and a layer of magnetic film in which the orientation of magnetization may be fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization is referred to as a sense layer or data storage layer and the magnetic film that is fixed is referred to as a reference layer or pinned layer. A barrier layer is located between the sense layer and the reference layer.
Conductive traces referred to as word lines and bit lines are routed across the array of memory cells. Word lines extend along rows of the memory cells and bit lines extend along columns of the memory cells. A memory cell stores a bit of information as an orientation of magnetization in the sense layer at each intersection of a word line and a bit line. The orientation of magnetization in the sense layer aligns along an axis referred to as the easy axis. Magnetic fields are applied to flip the orientation of magnetization in the sense layer along its easy axis to either a parallel or anti-parallel orientation relative to the orientation of magnetization in the reference layer.
Conductive traces referred to as write lines are routed across the array of memory cells to aid in flipping the orientation of magnetization in the sense layers. Write lines extend along columns of the memory cells near the sense layers and parallel to the bit lines. Word lines extend along rows of memory cells near the reference layers. A memory cell is situated at each intersection of a write line and a word line. The write lines and word lines are electrically coupled to a write circuit.
During a write operation, the write circuit selects one word line and one write line to change the orientation of magnetization in the sense layer of the memory cell situated at the conductors crossing point. The write circuit supplies write currents to the selected word line and write line to generate magnetic fields in the selected memory cell. The magnetic fields combine to switch the orientation of magnetization in the selected memory cell from parallel to anti-parallel or vice-versa.
The resistance through a memory cell differs according to the parallel or anti-parallel orientation of magnetization in the sense layer relative to the reference layer. The resistance is highest in an anti-parallel orientation, the logic 1 state, and lowest in a parallel orientation, the logic 0 state. The resistance through a memory cell can be used to distinguish between the parallel and anti-parallel states of a memory cell.
Word lines and bit lines aid in sensing the resistance through a memory cell to distinguish between the states of a memory cell. Word lines, are electrically coupled to reference layers. Bit lines, are electrically coupled to sense layers. The word lines and bit lines are also electrically coupled to a read circuit.
During a read operation, the read circuit selects one word line and one bit line to determine the resistance of the memory cell situated at the conductors crossing point. The read circuit supplies a voltage across the selected memory cell to generate a sense current through the memory cell. The read circuit uses the sense current to determine the resistance through the memory cell and distinguish between the parallel and anti-parallel states of the memory cell. The resistance through a memory cell can vary widely from one cell to another and from one device to another.
The resistance through a memory cell depends on barrier layer thickness and memory cell area. The barrier layer is a very thin insulating layer between the sense layer and the reference layer. This insulating layer can be aluminum oxide and Angstroms thick. The resistance through a memory cell varies exponentially with the thickness of the barrier layer. A change in barrier layer thickness of only 2 percent can change the resistance through a memory cell by a factor of 2. Also, the resistance through a memory cell is dependent on memory cell area that varies from one cell to another due to photolithography limitations. Even with tight controls, memory cell resistance varies a great deal from one cell to another and from one memory device to another. For this reason, absolute resistance values do not always accurately distinguish between the parallel and anti-parallel states of a memory cell.